Transistors are often specified with two collector-emitter max voltages:

  • (Vces) collector-emitter voltage (Vbe=0V)
  • (Vceo) collector-emitter voltage (Ib=0A)

Vceo(sus) is the Collector-Emitter Sustaining Voltage and its confusing. It’s basically the the collector-emitter breakdown voltage with the base open circuit, which is the most vulnerable state for a transistor. This diagram from Electrical Ratings and Characteristics of Power Semiconductor Switching Devices gives a good explanation of what’s at play:

Vceo is the left most line, demonstrating the maximum voltage before the transistor will breakdown with the base floating.

If your transistor base won’t ever be floating, then this specification is not a limiting factor for you and your breakdown voltage will be based on one of the lines to the right of it (with the typical Vces specification being the 3rd line).

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